URL https://opencores.org/ocsvn/altor32/altor32/trunk

Subversion Repositories altor32

[/] [altor32/] [trunk/] [rtl] - Rev 45

Rev	Log message	Author	Age	Path
45	Fix use before declaration (fails on older ISE variants).	ultra_embedded	3595d 15h	/altor32/trunk/rtl
44	Add single step support	ultra_embedded	3643d 19h	/altor32/trunk/rtl
40	- Add support for 2 way instruction cache (not yet enabled) - Bug fixes and tidy up	ultra_embedded	3657d 22h	/altor32/trunk/rtl
39	Bug fix interrupt handling after last update.	ultra_embedded	3662d 19h	/altor32/trunk/rtl
37	- Add icarus sim test - Adopt consistent naming scheme - Simplify instruction cache	ultra_embedded	3672d 03h	/altor32/trunk/rtl
36	Various performance improvements and bug fixes.	ultra_embedded	3677d 16h	/altor32/trunk/rtl
34	Add cutdown non-pipelined version of core.	ultra_embedded	3701d 01h	/altor32/trunk/rtl
32	Switch memory interfaces to Wishbone (pipelined). Various bug fixes and improvements.	ultra_embedded	3770d 20h	/altor32/trunk/rtl
31	Improvements to the execute stage logic.	ultra_embedded	3790d 20h	/altor32/trunk/rtl
30	Fix verilog issues which break in XST.	ultra_embedded	3874d 23h	/altor32/trunk/rtl
27	Initial drop of AltOR32 v2	ultra_embedded	3875d 20h	/altor32/trunk/rtl