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[/] [async_sdm_noc/] - Rev 82

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Rev Log message Author Age Path
82 correct some typoes, thanks to Hu, Tao wsong0210 3984d 20h /async_sdm_noc/
81 adding a solution in README to a cell lib problem. wsong0210 4352d 20h /async_sdm_noc/
80 make the README file more understandable wsong0210 4432d 16h /async_sdm_noc/
79 update comments in sim compile.sh to clarify that synthesis must be done before post-synthesis simulation wsong0210 4493d 02h /async_sdm_noc/
78 pass link wsong0210 4659d 14h /async_sdm_noc/
77 pass syn elaboration wsong0210 4660d 13h /async_sdm_noc/
76 fix syntex wsong0210 4664d 13h /async_sdm_noc/
75 code finished, start the debugging wsong0210 4664d 14h /async_sdm_noc/
74 in/out buffer finished wsong0210 4665d 14h /async_sdm_noc/
73 input buffer wsong0210 4672d 13h /async_sdm_noc/
72 clos-opt ongoing, Clos switch finished, nxt input buffer wsong0210 4673d 13h /async_sdm_noc/
71 the buffered 2-stage Clos switch wsong0210 4674d 13h /async_sdm_noc/
70 clos-opt ongoing wsong0210 4674d 13h /async_sdm_noc/
69 central module of the Clos wsong0210 4677d 13h /async_sdm_noc/
68 rewite the clos switch in the SDM-Clos-buf router wsong0210 4678d 13h /async_sdm_noc/
67 structure not good, prepare to use new files wsong0210 4678d 15h /async_sdm_noc/
66 clos opt ongoing wsong0210 4693d 07h /async_sdm_noc/
65 pipeline controller wsong0210 4693d 08h /async_sdm_noc/
64 clos opt ongoing wsong0210 4693d 08h /async_sdm_noc/
63 clos opt ongoing wsong0210 4693d 12h /async_sdm_noc/

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