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Rev Log message Author Age Path
124 ALTERA_RAM supported. mohor 7560d 11h /
123 This commit was manufactured by cvs2svn to create tag 'rel_17'. 7567d 17h /
122 This commit was manufactured by cvs2svn to create tag 'rel_16'. 7567d 17h /
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.
mohor 7567d 17h /
120 This commit was manufactured by cvs2svn to create tag 'rel_15'. 7576d 14h /
119 Artisan RAMs added. mohor 7576d 14h /
118 Artisan RAM fixed (when not using BIST). mohor 7576d 14h /
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.
mohor 7576d 14h /
116 This commit was manufactured by cvs2svn to create tag 'rel_14'. 7582d 08h /
115 Artisan ram instances added. simons 7582d 08h /
114 This commit was manufactured by cvs2svn to create tag 'rel_13'. 7609d 08h /
113 This commit was manufactured by cvs2svn to create tag 'rel_12'. 7609d 08h /
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7609d 08h /
111 Fixed according to the linter.
Case statement for data_out joined.
mohor 7611d 08h /
110 Fixed according to the linter. mohor 7611d 08h /
109 Fixed according to the linter. mohor 7611d 10h /
108 Fixed according to the linter. mohor 7611d 10h /
107 Fixed according to the linter. mohor 7611d 10h /
106 Unused signal removed. mohor 7617d 08h /
105 This commit was manufactured by cvs2svn to create tag 'rel_11'. 7617d 22h /

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