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Rev	Log message	Author	Age	Path
136	Error counters changed.	mohor	7407d 09h	/
135	Header changed.	mohor	7407d 10h	/
134	Active high/low problem when Altera devices are used. Bug fixed by Rojhalat Ibrahim.	mohor	7515d 07h	/
133	This commit was manufactured by cvs2svn to create tag 'rel_19'.		7521d 18h	/
132	This commit was manufactured by cvs2svn to create tag 'asyst_3'.		7521d 18h	/
131	This commit was manufactured by cvs2svn to create tag 'asyst_2'.		7521d 18h	/
130	mbist signals updated according to newest convention	markom	7521d 18h	/
129	Error counters changed.	mohor	7538d 03h	/
128	This commit was manufactured by cvs2svn to create tag 'rel_18'.		7538d 03h	/
127	Fixing the core to be Bosch VHDL Reference compatible.	mohor	7538d 03h	/
126	Error counters fixed to be compatible with Bosch VHDL reference model. Small synchronization changes.	mohor	7538d 23h	/
125	Synchronization changed, error counters fixed.	mohor	7543d 05h	/
124	ALTERA_RAM supported.	mohor	7563d 11h	/
123	This commit was manufactured by cvs2svn to create tag 'rel_17'.		7570d 17h	/
122	This commit was manufactured by cvs2svn to create tag 'rel_16'.		7570d 17h	/
121	When detecting bus-free, signal bus_free_cnt_en was cleared to zero although the last sampled bit was zero instead of one.	mohor	7570d 17h	/
120	This commit was manufactured by cvs2svn to create tag 'rel_15'.		7579d 14h	/
119	Artisan RAMs added.	mohor	7579d 14h	/
118	Artisan RAM fixed (when not using BIST).	mohor	7579d 14h	/
117	Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need to be joined together on higher level.	mohor	7579d 14h	/

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