URL https://opencores.org/ocsvn/common/common/trunk

Subversion Repositories common

[/] - Rev 30

Rev	Log message	Author	Age	Path
30	no message	bbeaver	8248d 14h	/
29	got timing checks mostly correct No functional stuff yet	bbeaver	8248d 14h	/
28	no message	bbeaver	8249d 15h	/
27	no message	bbeaver	8250d 14h	/
26	no message	bbeaver	8251d 13h	/
25	no message	bbeaver	8252d 15h	/
24	no message	bbeaver	8254d 16h	/
23	no message	bbeaver	8255d 16h	/
22	no message	bbeaver	8255d 19h	/
21	Added bookmarks.	lampret	8256d 08h	/
20	Some minor fixes. Document is now official version.	lampret	8256d 09h	/
19	no message	bbeaver	8257d 17h	/
18	no message	bbeaver	8258d 15h	/
17	Fixed link to specification_template.dot	lampret	8258d 23h	/
16	Added updated opencores coding guidelines. Added ver_plan.pdf and Specification template for Word.	lampret	8259d 00h	/
15	no message	bbeaver	8278d 21h	/
14	adding beginning LPM files	bbeaver	8290d 17h	/
13	This commit was manufactured by cvs2svn to create tag 'initial'.		8296d 17h	/
12	Major cleanup. Files are now compliant to Altera & Xilinx memories. Memories are now compatible, i.e. drop-in replacements. Added synthesizeable generic FPGA description. Created "generic_memories" cvs entry.	rherveille	8296d 17h	/
11	no message	bbeaver	8303d 15h	/