OpenCores
URL https://opencores.org/ocsvn/cpu_lecture/cpu_lecture/trunk

Subversion Repositories cpu_lecture

[/] - Rev 22

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
22 aligned I/O port numbers to real mega8 jsauermann 3885d 15h /
21 fixed bug in Sign bit computation for SUB and CP instructions jsauermann 3887d 09h /
20 readability of 95xx instructions improved jsauermann 3919d 06h /
19 another bug in the decoding of two-cycle instructions fixed jsauermann 3919d 06h /
18 fixed a bug that caused double execution of some 95xx instructions jsauermann 3922d 08h /
17 fixed missing carry flag for ROR instruction jsauermann 3926d 07h /
16 fixed missing RD_M signal for IN instruction jsauermann 3935d 08h /
15 fixed SP auto inc/dec problem jsauermann 3935d 10h /
14 fixed wrong Q_RSEL for LDD instruction jsauermann 3937d 06h /
13 fixed fault in LDD/STD decoding jsauermann 3938d 06h /
12 fixed bug in decoding of I/O address for SP jsauermann 3939d 06h /
11 fixed fault is BSET/BCLR instruction jsauermann 3941d 07h /
10 wait decoder fault fixed jsauermann 3941d 12h /
9 renamed 'main' to 'hello' in build commands jsauermann 3942d 08h /
8 picture quality slightly improved jsauermann 3942d 13h /
7 support multiple port sizes in make_mem jsauermann 3942d 14h /
6 support multiple port sizes in make_mem jsauermann 3942d 14h /
5 support multiple port sizes in make_mem jsauermann 3942d 14h /
4 initial check-in jsauermann 3946d 11h /
3 initial check-in jsauermann 3946d 15h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.