URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [asyst_2/] - Rev 158

Rev	Log message	Author	Age	Path
126	run_sim.scr renamed to run_sim for VATS.	mohor	7428d 04h	/dbg_interface/tags/asyst_2/
124	Display for VATS added.	mohor	7430d 00h	/dbg_interface/tags/asyst_2/
123	All flipflops are reset.	mohor	7430d 01h	/dbg_interface/tags/asyst_2/
121	Port signals are all set to zero after reset.	mohor	7433d 01h	/dbg_interface/tags/asyst_2/
120	test stall_test added.	mohor	7433d 04h	/dbg_interface/tags/asyst_2/
119	cpu_stall_o activated as soon as bp occurs.	mohor	7433d 04h	/dbg_interface/tags/asyst_2/
117	Define name changed.	mohor	7435d 00h	/dbg_interface/tags/asyst_2/
116	Data latching changed when testing WB.	mohor	7435d 01h	/dbg_interface/tags/asyst_2/
115	More debug data added.	mohor	7435d 04h	/dbg_interface/tags/asyst_2/
114	CRC generation iand verification in bench changed.	mohor	7435d 06h	/dbg_interface/tags/asyst_2/