URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [new_debug/] - Rev 158

Rev	Log message	Author	Age	Path
77	MBIST chain connection fixed.	mohor	7513d 15h	/dbg_interface/tags/new_debug/
75	Simulation files.	mohor	7513d 16h	/dbg_interface/tags/new_debug/
74	Removed.	mohor	7513d 16h	/dbg_interface/tags/new_debug/
73	CRC logic changed.	mohor	7513d 16h	/dbg_interface/tags/new_debug/
71	Mbist support added.	simons	7515d 23h	/dbg_interface/tags/new_debug/
70	A pdf copy of existing doc document.	simons	7523d 01h	/dbg_interface/tags/new_debug/
69	WBCNTL added, multiple CPU support described.	simons	7543d 14h	/dbg_interface/tags/new_debug/
67	Lower two address lines must be always zero.	simons	7548d 19h	/dbg_interface/tags/new_debug/
65	WB_CNTL register added, some syncronization fixes.	simons	7549d 18h	/dbg_interface/tags/new_debug/
63	Three more chains added for cpu debug access.	simons	7569d 19h	/dbg_interface/tags/new_debug/