URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] - Rev 127

Rev	Log message	Author	Age	Path
127	This commit was manufactured by cvs2svn to create tag 'rel_19'.		7418d 10h	/
126	run_sim.scr renamed to run_sim for VATS.	mohor	7418d 10h	/
125	This commit was manufactured by cvs2svn to create tag 'rel_18'.		7420d 07h	/
124	Display for VATS added.	mohor	7420d 07h	/
123	All flipflops are reset.	mohor	7420d 07h	/
122	This commit was manufactured by cvs2svn to create tag 'rel_17'.		7423d 07h	/
121	Port signals are all set to zero after reset.	mohor	7423d 07h	/
120	test stall_test added.	mohor	7423d 10h	/
119	cpu_stall_o activated as soon as bp occurs.	mohor	7423d 11h	/
118	This commit was manufactured by cvs2svn to create tag 'rel_16'.		7425d 07h	/
117	Define name changed.	mohor	7425d 07h	/
116	Data latching changed when testing WB.	mohor	7425d 07h	/
115	More debug data added.	mohor	7425d 11h	/
114	CRC generation iand verification in bench changed.	mohor	7425d 12h	/
113	IDCODE test improved.	mohor	7425d 13h	/
112	dbg_tb_defines.v not used.	mohor	7426d 08h	/
111	Define tap_defines.v added to test bench.	mohor	7426d 08h	/
110	Waiting for "ready" improved.	mohor	7426d 08h	/
109	This commit was manufactured by cvs2svn to create tag 'rel_15'.		7426d 13h	/
108	Reset values width added because of FV, a good sentence changed because some tools can not handle it.	simons	7426d 13h	/