URL https://opencores.org/ocsvn/debouncer_vhdl/debouncer_vhdl/trunk

Subversion Repositories debouncer_vhdl

[/] [debouncer_vhdl/] [trunk/] [bench/] [debounce_vhdl_bench.xise] - Rev 9

Rev	Log message	Author	Age	Path
9	Clarified the licensing. Added SVN directory for the license text. Changed the LGPL url at the rtl code header. Included the LGPL 3.0 text "lgpl.txt"	jdoin	4636d 13h	/debouncer_vhdl/trunk/bench/debounce_vhdl_bench.xise
6	- fixed some minor comments errors; - added ISE report files; - added generated bitgen file (zipped) to test in the Digilent Atlys board;	jdoin	4655d 23h	/debouncer_vhdl/trunk/bench/debounce_vhdl_bench.xise
4	v1.01.0026 [JD]: - removed remnants of SPI_MASTER_SLAVE project from ISE project files. - added pinlock constraint for strobe output for FPGA test.	jdoin	4656d 03h	/debouncer_vhdl/trunk/bench/debounce_vhdl_bench.xise
3	v1.01.0025 [JD]: - added a pipeline delay for new data strobe output. - included a complete verification project, for simulation and FPGA verification.	jdoin	4656d 03h	/debouncer_vhdl/trunk/bench/debounce_vhdl_bench.xise