OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 168

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 7897d 03h /
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 7898d 04h /
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.		 mohor 7899d 04h /
165 HASH improvement needed. mohor 7899d 07h /
164 Ethernet debug registers removed. mohor 7899d 07h /
163 Another temporary version. Core is almost finished. Testbench not included,
yet"		 mohor 7899d 23h /
162 Another temporary version. Core is almost finished. Testbench not included,
yet.		 mohor 7899d 23h /
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.		 mohor 7900d 05h /
160 error acknowledge cycle termination added to display. mohor 7900d 05h /
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.		 mohor 7901d 01h /
158 Typo fixed. mohor 7901d 02h /
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 7903d 07h /
156 Valid testbench. mohor 7903d 07h /
155 Minor changes. mohor 7903d 07h /
154 Design document is still under construction. mohor 7904d 06h /
153 Temp version (backup). mohor 7904d 22h /
152 Version 1.16 created. See revision history in the document for details. mohor 7904d 22h /
151 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7904d 23h /
150 Debug registers reg1, 2, 3, 4 connected. Synchronization of many signals
changed (bugs fixed). Access to un-alligned buffers fixed. RxAbort signal
was not used OK.		 mohor 7904d 23h /
149 Signals related to the control frames connected. Debug registers reg1, 2, 3, 4
connected.		 mohor 7904d 23h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.