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Rev Log message Author Age Path
172 NCSIM simulation environment added to cvs mohor 7919d 01h /
171 NCSIM simulation environment added. mohor 7919d 01h /
170 Headers changed. mohor 7919d 01h /
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 7919d 02h /
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 7919d 23h /
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 7920d 23h /
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.
mohor 7922d 00h /
165 HASH improvement needed. mohor 7922d 03h /
164 Ethernet debug registers removed. mohor 7922d 03h /
163 Another temporary version. Core is almost finished. Testbench not included,
mohor 7922d 19h /
162 Another temporary version. Core is almost finished. Testbench not included,
mohor 7922d 19h /
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.
mohor 7923d 01h /
160 error acknowledge cycle termination added to display. mohor 7923d 01h /
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.
mohor 7923d 21h /
158 Typo fixed. mohor 7923d 21h /
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 7926d 03h /
156 Valid testbench. mohor 7926d 03h /
155 Minor changes. mohor 7926d 03h /
154 Design document is still under construction. mohor 7927d 02h /
153 Temp version (backup). mohor 7927d 17h /

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