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Rev Log message Author Age Path
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).
mohor 7980d 16h /
188 PHY changed. tadej 7981d 13h /
187 _info file added. mohor 7981d 13h /
186 Macro for testbench (DO file). mohor 7981d 14h /
185 Directory keeper. mohor 7981d 14h /
184 Modelsim simulation environment should be ready now. mohor 7981d 14h /
183 Modelsim environment added. mohor 7981d 14h /
182 Full duplex test improved. tadej 7982d 15h /
181 MIIM test look better. mohor 7982d 18h /
180 Bench outputs data to display every 128 bytes. mohor 7985d 14h /
179 Beautiful tests merget together mohor 7985d 14h /
178 Rearanged testcases mohor 7985d 14h /
177 Bug in MIIM fixed. mohor 7985d 18h /
176 lists changed to new directory structure mohor 7985d 20h /
175 Script fixed to new dir structure mohor 7985d 20h /
174 Directory keeper mohor 7985d 20h /
173 Keeps the directory mohor 7985d 20h /
172 NCSIM simulation environment added to cvs mohor 7985d 20h /
171 NCSIM simulation environment added. mohor 7985d 20h /
170 Headers changed. mohor 7985d 20h /
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 7985d 21h /
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 7986d 18h /
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 7987d 19h /
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.
mohor 7988d 19h /
165 HASH improvement needed. mohor 7988d 22h /
164 Ethernet debug registers removed. mohor 7988d 22h /
163 Another temporary version. Core is almost finished. Testbench not included,
yet"
mohor 7989d 14h /
162 Another temporary version. Core is almost finished. Testbench not included,
yet.
mohor 7989d 14h /
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.
mohor 7989d 20h /
160 error acknowledge cycle termination added to display. mohor 7989d 20h /

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