OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 240

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7840d 13h /
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7840d 13h /
238 Defines fixed to use generic RAM by default. mohor 7852d 17h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 7854d 23h /
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7854d 23h /
235 rev 4. mohor 7855d 13h /
234 Figure list assed to the revision 3. mohor 7855d 21h /
233 Revision 0.3 released. Some figures added. mohor 7855d 22h /
232 fpga define added. mohor 7860d 17h /
231 Description of Core Modules added (figure). mohor 7862d 18h /
230 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7866d 15h /
229 case changed to casex. mohor 7866d 15h /
228 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7866d 18h /
227 Changed BIST scan signals. tadejm 7866d 18h /
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7866d 20h /
225 Some minor changes. tadejm 7866d 20h /
224 Signals for a wave window in Modelsim. tadejm 7866d 21h /
223 Some code changed due to bug fixes. tadejm 7866d 22h /
222 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7870d 19h /
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7870d 19h /
220 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7873d 20h /
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 7873d 20h /
218 Typo error fixed. (When using Bist) mohor 7873d 22h /
217 Bist supported. mohor 7873d 22h /
216 Bist signals added. mohor 7873d 22h /
215 Bist supported. mohor 7873d 23h /
214 Signals for WISHBONE B3 compliant interface added. mohor 7874d 19h /
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 7874d 19h /
212 Minor $display change. mohor 7874d 19h /
211 Bist added. mohor 7874d 19h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.