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Rev Log message Author Age Path
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 6480d 18h /
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 6480d 18h /
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 6480d 18h /
238 Defines fixed to use generic RAM by default. mohor 6492d 22h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 6495d 03h /
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 6495d 03h /
235 rev 4. mohor 6495d 18h /
234 Figure list assed to the revision 3. mohor 6496d 02h /
233 Revision 0.3 released. Some figures added. mohor 6496d 02h /
232 fpga define added. mohor 6500d 21h /
231 Description of Core Modules added (figure). mohor 6502d 23h /
230 This commit was manufactured by cvs2svn to create tag 'rel_8'. 6506d 19h /
229 case changed to casex. mohor 6506d 19h /
228 This commit was manufactured by cvs2svn to create tag 'rel_7'. 6506d 23h /
227 Changed BIST scan signals. tadejm 6506d 23h /
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 6507d 01h /
225 Some minor changes. tadejm 6507d 01h /
224 Signals for a wave window in Modelsim. tadejm 6507d 02h /
223 Some code changed due to bug fixes. tadejm 6507d 02h /
222 This commit was manufactured by cvs2svn to create tag 'rel_6'. 6511d 00h /

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