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242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 7796d 03h /
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7796d 03h /
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7796d 03h /
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7796d 04h /
238 Defines fixed to use generic RAM by default. mohor 7808d 08h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 7810d 13h /
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7810d 13h /
235 rev 4. mohor 7811d 04h /
234 Figure list assed to the revision 3. mohor 7811d 12h /
233 Revision 0.3 released. Some figures added. mohor 7811d 12h /
232 fpga define added. mohor 7816d 07h /
231 Description of Core Modules added (figure). mohor 7818d 08h /
230 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7822d 05h /
229 case changed to casex. mohor 7822d 05h /
228 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7822d 09h /
227 Changed BIST scan signals. tadejm 7822d 09h /
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7822d 10h /
225 Some minor changes. tadejm 7822d 10h /
224 Signals for a wave window in Modelsim. tadejm 7822d 12h /
223 Some code changed due to bug fixes. tadejm 7822d 12h /

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