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Rev Log message Author Age Path
252 Just some updates. tadejm 6906d 23h /
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 6906d 23h /
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 6906d 23h /
249 This commit was manufactured by cvs2svn to create tag 'rel_11'. 6907d 23h /
248 wb_rst_i is used for MIIM reset. mohor 6907d 23h /
247 This commit was manufactured by cvs2svn to create tag 'rel_10'. 6911d 02h /
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 6911d 02h /
245 Rev 1.7. mohor 6911d 19h /
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 6911d 22h /
243 Late collision is not reported any more. tadejm 6912d 03h /
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 6912d 18h /
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 6912d 18h /
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 6912d 18h /
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 6912d 18h /
238 Defines fixed to use generic RAM by default. mohor 6924d 22h /
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 6927d 03h /
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 6927d 03h /
235 rev 4. mohor 6927d 18h /
234 Figure list assed to the revision 3. mohor 6928d 02h /
233 Revision 0.3 released. Some figures added. mohor 6928d 02h /

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