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307 This commit was manufactured by cvs2svn to create tag 'rel_24'. 7893d 09h /
306 Lapsus fixed (!we -> ~we). simons 7893d 09h /
305 This commit was manufactured by cvs2svn to create tag 'rel_23'. 7915d 05h /
304 WISHBONE slave changed and tested from only 32-bit accesss to byte access. tadejm 7915d 05h /
303 This commit was manufactured by cvs2svn to create tag 'rel_22'. 7941d 16h /
302 mbist signals updated according to newest convention markom 7941d 16h /
301 Update RxEnSync only when mrxdv_pad_i is inactive (LOW). knguyen 7952d 08h /
300 This commit was manufactured by cvs2svn to create tag 'rel_21'. 7999d 12h /
299 Artisan RAMs added. mohor 7999d 12h /
298 This commit was manufactured by cvs2svn to create tag 'rel_20'. 8005d 07h /
297 Artisan ram instance added. simons 8005d 07h /
296 This commit was manufactured by cvs2svn to create tag 'rel_19'. 8006d 10h /
295 Few minor changes. tadejm 8006d 10h /
294 Added path to a file with distributed RAM instances for xilinx. tadejm 8008d 11h /
293 initial. tadejm 8032d 08h /
292 Corrected mistake. tadejm 8032d 08h /
291 initial tadejm 8032d 09h /
290 Additional checking for FAILED tests added - for ATS. tadejm 8032d 10h /
289 This commit was manufactured by cvs2svn to create tag 'rel_18'. 8041d 09h /
288 This file was not part of the RTL before, but it should be here. simons 8041d 09h /

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