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Rev Log message Author Age Path
344 bit 9 in phy control register is self clearing olof 4672d 03h /
343 Address miss should not be asserted on short frames olof 4675d 23h /
342 Added cast to avoid inequality when comparing different data types olof 4675d 23h /
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4675d 23h /
340 Don't fail if log dir already exists olof 4676d 20h /
339 Added basic support for Icarus Verilog olof 4677d 20h /
338 root 5470d 02h /
337 root 5526d 03h /
336 Added old uploaded documents to new repository. root 5527d 07h /
335 New directory structure. root 5527d 07h /
334 Minor fixes for Icarus simulator. igorm 6975d 09h /
333 Some small fixes + some troubles fixed. igorm 6975d 21h /
332 Case statement improved for synthesys. igorm 6989d 02h /
331 Tests for delayed CRC and defer indication added. igorm 7004d 04h /
330 Warning fixes. igorm 7004d 04h /
329 Defer indication fixed. igorm 7004d 05h /
328 Delayed CRC fixed. igorm 7004d 05h /
327 Defer indication fixed. igorm 7004d 06h /
326 Delayed CRC fixed. igorm 7004d 06h /
325 Defer indication fixed. igorm 7004d 06h /

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