OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 357

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 4648d 15h /
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4648d 17h /
355 Import Julius Baxter's verilator hints from ORPSoC olof 4648d 18h /
354 Whitespace cleanup olof 4648d 18h /
353 Inherit fixes for bit width of constants from ORPSoC olof 4650d 20h /
352 Removed delayed assignments from rtl code olof 4655d 02h /
351 Turn defines into parameters in eth_cop olof 4663d 15h /
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4663d 16h /
349 Make all parameters configurable from top level olof 4664d 17h /
348 Added option to dump VCD files olof 4665d 16h /
347 Added information about running with Icarus Verilog olof 4665d 16h /
346 Updated project location olof 4665d 18h /
345 Temporarily disable failing tests olof 4665d 20h /
344 bit 9 in phy control register is self clearing olof 4671d 22h /
343 Address miss should not be asserted on short frames olof 4675d 18h /
342 Added cast to avoid inequality when comparing different data types olof 4675d 18h /
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4675d 18h /
340 Don't fail if log dir already exists olof 4676d 16h /
339 Added basic support for Icarus Verilog olof 4677d 15h /
338 root 5469d 21h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.