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Rev Log message Author Age Path
366 Readded eth_top.v with a deprecation warning olof 4634d 05h /
365 Whitespace cleanup olof 4635d 05h /
364 Renamed eth_top.v to ethmac.v to fit better into OpenCores structure olof 4636d 02h /
363 quartus project files unneback 4636d 11h /
362 added Makefiles to build project unneback 4636d 11h /
361 created branch unneback unneback 4636d 11h /
360 Added partial implementation of the debug register from ORPSoC olof 4637d 10h /
359 Verilator linting fixes olof 4639d 12h /
358 Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version olof 4641d 02h /
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 4641d 02h /
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4641d 04h /
355 Import Julius Baxter's verilator hints from ORPSoC olof 4641d 05h /
354 Whitespace cleanup olof 4641d 05h /
353 Inherit fixes for bit width of constants from ORPSoC olof 4643d 07h /
352 Removed delayed assignments from rtl code olof 4647d 12h /
351 Turn defines into parameters in eth_cop olof 4656d 02h /
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4656d 03h /
349 Make all parameters configurable from top level olof 4657d 03h /
348 Added option to dump VCD files olof 4658d 02h /
347 Added information about running with Icarus Verilog olof 4658d 03h /

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