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Rev Log message Author Age Path
348 Added option to dump VCD files olof 3961d 21h /
347 Added information about running with Icarus Verilog olof 3961d 22h /
346 Updated project location olof 3962d 00h /
345 Temporarily disable failing tests olof 3962d 02h /
344 bit 9 in phy control register is self clearing olof 3968d 04h /
343 Address miss should not be asserted on short frames olof 3972d 00h /
342 Added cast to avoid inequality when comparing different data types olof 3972d 00h /
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 3972d 00h /
340 Don't fail if log dir already exists olof 3972d 21h /
339 Added basic support for Icarus Verilog olof 3973d 21h /

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