OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 42

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
42 Rx status is written back to the BD. mohor 8119d 03h /
41 non-DMA host interface added. Select the right configutation in eth_defines. mohor 8121d 05h /
40 Both rx and tx part are finished. Tested with wb_clk_i between 10 and 200
MHz. Statuses, overrun, control frame transmission and reception still need
to be fixed.
mohor 8122d 03h /
39 Tx part finished. TxStatus needs to be fixed. Pause request needs to be
added.
mohor 8126d 07h /
38 Initial version. Equals to eth_wishbonedma.v at this moment. mohor 8135d 09h /
37 Link in the header changed. mohor 8135d 09h /
36 TX_BD_NUM register added instead of the RB_BD_ADDR. mohor 8181d 07h /
35 RX_BD_NUM changed to TX_BD_NUM. Few typos corrected. mohor 8184d 04h /
34 RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors
instead of the number of RX descriptors).
mohor 8184d 05h /
33 ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead. mohor 8184d 09h /
32 ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead. mohor 8184d 09h /
31 RX_BD_NUM register added instead of the RB_BD_ADDR. mohor 8184d 10h /
30 BD section updated. mohor 8186d 06h /
29 Generic memory model is used. Defines are changed for the same reason. mohor 8206d 05h /
28 New release. Name changed to lower case. mohor 8208d 21h /
27 File names changed to lower case. mohor 8208d 21h /
26 First release of product brief. mohor 8208d 21h /
25 First release of product brief. mohor 8208d 21h /
24 Log file added. mohor 8231d 08h /
23 Number of addresses (wb_adr_i) minimized. mohor 8231d 08h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.