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Rev Log message Author Age Path
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8082d 18h /
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.		 mohor 8083d 21h /
91 Comments in Slovene language removed. mohor 8083d 21h /
90 casex changed with case, fifo reset changed. mohor 8083d 21h /
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.		 mohor 8087d 19h /
88 rx_fifo was not always cleared ok. Fixed. mohor 8093d 18h /
87 Status was not latched correctly sometimes. Fixed. mohor 8093d 20h /
86 Big Endian problem when sending frames fixed. mohor 8095d 03h /
85 Log info was missing. mohor 8100d 13h /
84 LinkFail signal was not latching appropriate bit. mohor 8100d 13h /
83 MAC address recognition was not correct (bytes swaped). mohor 8100d 13h /
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8100d 14h /
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8100d 15h /
80 Small fixes for external/internal DMA missmatches. mohor 8104d 17h /
79 RetryCntLatched was unused and removed from design mohor 8104d 17h /
78 WB_SEL_I was unused and removed from design mohor 8104d 17h /
77 Interrupts changed mohor 8104d 17h /
76 Interrupts changed in the top file mohor 8104d 17h /
75 r_Bro is used for accepting/denying frames mohor 8104d 17h /
74 Reset values are passed to registers through parameters mohor 8104d 17h /
73 Number of interrupts changed mohor 8104d 18h /
72 Retry is not activated when a Tx Underrun occured mohor 8108d 21h /
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.		 mohor 8112d 22h /
70 Small fixes. mohor 8112d 23h /
69 Define missmatch fixed. mohor 8113d 20h /
68 Registered trimmed. Unused registers removed. mohor 8114d 20h /
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8114d 21h /
66 Testbench fixed, code simplified, unused signals removed. mohor 8115d 02h /
65 Testbench fixed, code simplified, unused signals removed. mohor 8115d 02h /
64 Status was not written correctly when frames were discarted because of
address mismatch.		 mohor 8115d 17h /

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