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Rev Log message Author Age Path
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4213d 09h /ethmac/
349 Make all parameters configurable from top level olof 4214d 09h /ethmac/
348 Added option to dump VCD files olof 4215d 08h /ethmac/
347 Added information about running with Icarus Verilog olof 4215d 09h /ethmac/
346 Updated project location olof 4215d 11h /ethmac/
345 Temporarily disable failing tests olof 4215d 13h /ethmac/
344 bit 9 in phy control register is self clearing olof 4221d 15h /ethmac/
343 Address miss should not be asserted on short frames olof 4225d 11h /ethmac/
342 Added cast to avoid inequality when comparing different data types olof 4225d 11h /ethmac/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4225d 11h /ethmac/
340 Don't fail if log dir already exists olof 4226d 08h /ethmac/
339 Added basic support for Icarus Verilog olof 4227d 08h /ethmac/
338 root 5019d 13h /ethmac/
337 root 5075d 15h /ethernet/
336 Added old uploaded documents to new repository. root 5076d 19h /ethernet/
335 New directory structure. root 5076d 19h /ethernet/

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