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Rev Log message Author Age Path
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 3788d 01h /ethmac/
349 Make all parameters configurable from top level olof 3789d 02h /ethmac/
348 Added option to dump VCD files olof 3790d 00h /ethmac/
347 Added information about running with Icarus Verilog olof 3790d 01h /ethmac/
346 Updated project location olof 3790d 03h /ethmac/
345 Temporarily disable failing tests olof 3790d 05h /ethmac/
344 bit 9 in phy control register is self clearing olof 3796d 07h /ethmac/
343 Address miss should not be asserted on short frames olof 3800d 03h /ethmac/
342 Added cast to avoid inequality when comparing different data types olof 3800d 03h /ethmac/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 3800d 03h /ethmac/
340 Don't fail if log dir already exists olof 3801d 01h /ethmac/
339 Added basic support for Icarus Verilog olof 3802d 00h /ethmac/
338 root 4594d 06h /ethmac/
337 root 4650d 08h /ethernet/
336 Added old uploaded documents to new repository. root 4651d 11h /ethernet/
335 New directory structure. root 4651d 11h /ethernet/

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