OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] - Rev 359

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
359 Verilator linting fixes olof 4657d 07h /ethmac/
358 Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version olof 4658d 21h /ethmac/
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 4658d 21h /ethmac/
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4658d 23h /ethmac/
355 Import Julius Baxter's verilator hints from ORPSoC olof 4659d 00h /ethmac/
354 Whitespace cleanup olof 4659d 00h /ethmac/
353 Inherit fixes for bit width of constants from ORPSoC olof 4661d 02h /ethmac/
352 Removed delayed assignments from rtl code olof 4665d 08h /ethmac/
351 Turn defines into parameters in eth_cop olof 4673d 22h /ethmac/
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4673d 22h /ethmac/
349 Make all parameters configurable from top level olof 4674d 23h /ethmac/
348 Added option to dump VCD files olof 4675d 22h /ethmac/
347 Added information about running with Icarus Verilog olof 4675d 22h /ethmac/
346 Updated project location olof 4676d 00h /ethmac/
345 Temporarily disable failing tests olof 4676d 02h /ethmac/
344 bit 9 in phy control register is self clearing olof 4682d 04h /ethmac/
343 Address miss should not be asserted on short frames olof 4686d 00h /ethmac/
342 Added cast to avoid inequality when comparing different data types olof 4686d 00h /ethmac/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4686d 00h /ethmac/
340 Don't fail if log dir already exists olof 4686d 22h /ethmac/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.