URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] - Rev 362

Rev	Log message	Author	Age	Path
362	added Makefiles to build project	unneback	4783d 03h	/ethmac/
361	created branch unneback	unneback	4783d 03h	/ethmac/
360	Added partial implementation of the debug register from ORPSoC	olof	4784d 01h	/ethmac/
359	Verilator linting fixes	olof	4786d 03h	/ethmac/
358	Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version	olof	4787d 17h	/ethmac/
357	Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC	olof	4787d 18h	/ethmac/
356	Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure	olof	4787d 19h	/ethmac/
355	Import Julius Baxter's verilator hints from ORPSoC	olof	4787d 20h	/ethmac/
354	Whitespace cleanup	olof	4787d 21h	/ethmac/
353	Inherit fixes for bit width of constants from ORPSoC	olof	4789d 22h	/ethmac/
352	Removed delayed assignments from rtl code	olof	4794d 04h	/ethmac/
351	Turn defines into parameters in eth_cop	olof	4802d 18h	/ethmac/
350	Turn M[1-2]_ADDRESSED_S[1-2] defines into wires	olof	4802d 18h	/ethmac/
349	Make all parameters configurable from top level	olof	4803d 19h	/ethmac/
348	Added option to dump VCD files	olof	4804d 18h	/ethmac/
347	Added information about running with Icarus Verilog	olof	4804d 19h	/ethmac/
346	Updated project location	olof	4804d 21h	/ethmac/
345	Temporarily disable failing tests	olof	4804d 22h	/ethmac/
344	bit 9 in phy control register is self clearing	olof	4811d 00h	/ethmac/
343	Address miss should not be asserted on short frames	olof	4814d 20h	/ethmac/