URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

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[/] [ethmac/] [branches/] [unneback/] [rtl/] [verilog/] - Rev 349

Rev	Log message	Author	Age	Path
302	mbist signals updated according to newest convention	markom	7507d 10h	/ethmac/branches/unneback/rtl/verilog/
301	Update RxEnSync only when mrxdv_pad_i is inactive (LOW).	knguyen	7518d 02h	/ethmac/branches/unneback/rtl/verilog/
297	Artisan ram instance added.	simons	7571d 01h	/ethmac/branches/unneback/rtl/verilog/
288	This file was not part of the RTL before, but it should be here.	simons	7607d 02h	/ethmac/branches/unneback/rtl/verilog/
286	Define file in eth_cop.v is changed to eth_defines.v. Some defines were moved from tb_eth_defines.v to eth_defines.v.	mohor	7633d 05h	/ethmac/branches/unneback/rtl/verilog/
285	Binary operator used instead of unary (xnor).	mohor	7633d 06h	/ethmac/branches/unneback/rtl/verilog/
284	Busy was set 2 cycles too late. Reported by Dennis Scott.	mohor	7661d 07h	/ethmac/branches/unneback/rtl/verilog/
283	RxBDAddress was updated also when value to r_TxBDNum was written with greater value than allowed.	mohor	7689d 01h	/ethmac/branches/unneback/rtl/verilog/
280	Reset has priority in some flipflops.	mohor	7767d 03h	/ethmac/branches/unneback/rtl/verilog/
278	A new bug (entered with previous update) fixed. When abort occured sometimes data transmission was blocked.	mohor	7767d 04h	/ethmac/branches/unneback/rtl/verilog/