URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] [rtl/] [verilog/] - Rev 361

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
361	created branch unneback	unneback	4641d 21h	/ethmac/branches/unneback/rtl/verilog/
352	Removed delayed assignments from rtl code	olof	4652d 22h	/ethmac/branches/unneback/rtl/verilog/
351	Turn defines into parameters in eth_cop	olof	4661d 12h	/ethmac/branches/unneback/rtl/verilog/
350	Turn M[1-2]_ADDRESSED_S[1-2] defines into wires	olof	4661d 13h	/ethmac/branches/unneback/rtl/verilog/
349	Make all parameters configurable from top level	olof	4662d 13h	/ethmac/branches/unneback/rtl/verilog/
346	Updated project location	olof	4663d 15h	/ethmac/branches/unneback/rtl/verilog/
341	Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short	olof	4673d 15h	/ethmac/branches/unneback/rtl/verilog/
338		root	5467d 17h	/ethmac/branches/unneback/rtl/verilog/
335	New directory structure.	root	5524d 23h	/ethmac/branches/unneback/rtl/verilog/
333	Some small fixes + some troubles fixed.	igorm	6973d 13h	/ethmac/branches/unneback/rtl/verilog/
332	Case statement improved for synthesys.	igorm	6986d 18h	/ethmac/branches/unneback/rtl/verilog/
330	Warning fixes.	igorm	7001d 20h	/ethmac/branches/unneback/rtl/verilog/
329	Defer indication fixed.	igorm	7001d 21h	/ethmac/branches/unneback/rtl/verilog/
328	Delayed CRC fixed.	igorm	7001d 21h	/ethmac/branches/unneback/rtl/verilog/
327	Defer indication fixed.	igorm	7001d 21h	/ethmac/branches/unneback/rtl/verilog/
326	Delayed CRC fixed.	igorm	7001d 22h	/ethmac/branches/unneback/rtl/verilog/
325	Defer indication fixed.	igorm	7001d 22h	/ethmac/branches/unneback/rtl/verilog/
323	Accidently deleted line put back.	igorm	7298d 22h	/ethmac/branches/unneback/rtl/verilog/
321	- Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the previous update of the core. - TxBDAddress is set to 0 after the TX is enabled in the MODER register. - RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER register. (thanks to Mathias and Torbjorn) - Multicast reception was fixed. Thanks to Ulrich Gries	igorm	7302d 17h	/ethmac/branches/unneback/rtl/verilog/
320	TX_BD_NUM_Wr error fixed. Error was entered with the last check-in.	igorm	7302d 21h	/ethmac/branches/unneback/rtl/verilog/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] [rtl/] [verilog/] - Rev 361

Filtering Options