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[/] [ethmac/] [branches/] [unneback/] [rtl/] [verilog/] - Rev 362

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Rev	Log message	Author	Age	Path
362	added Makefiles to build project	unneback	4651d 02h	/ethmac/branches/unneback/rtl/verilog
361	created branch unneback	unneback	4651d 02h	/ethmac/branches/unneback/rtl/verilog
352	Removed delayed assignments from rtl code	olof	4662d 04h	/ethmac/branches/unneback/rtl/verilog
351	Turn defines into parameters in eth_cop	olof	4670d 18h	/ethmac/branches/unneback/rtl/verilog
350	Turn M[1-2]_ADDRESSED_S[1-2] defines into wires	olof	4670d 18h	/ethmac/branches/unneback/rtl/verilog
349	Make all parameters configurable from top level	olof	4671d 19h	/ethmac/branches/unneback/rtl/verilog
346	Updated project location	olof	4672d 21h	/ethmac/branches/unneback/rtl/verilog
341	Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short	olof	4682d 21h	/ethmac/branches/unneback/rtl/verilog
338		root	5476d 23h	/ethmac/branches/unneback/rtl/verilog
335	New directory structure.	root	5534d 04h	/ethmac/branches/unneback/rtl/verilog
333	Some small fixes + some troubles fixed.	igorm	6982d 18h	/ethmac/branches/unneback/rtl/verilog
332	Case statement improved for synthesys.	igorm	6996d 00h	/ethmac/branches/unneback/rtl/verilog
330	Warning fixes.	igorm	7011d 01h	/ethmac/branches/unneback/rtl/verilog
329	Defer indication fixed.	igorm	7011d 03h	/ethmac/branches/unneback/rtl/verilog
328	Delayed CRC fixed.	igorm	7011d 03h	/ethmac/branches/unneback/rtl/verilog
327	Defer indication fixed.	igorm	7011d 03h	/ethmac/branches/unneback/rtl/verilog
326	Delayed CRC fixed.	igorm	7011d 03h	/ethmac/branches/unneback/rtl/verilog
325	Defer indication fixed.	igorm	7011d 04h	/ethmac/branches/unneback/rtl/verilog
323	Accidently deleted line put back.	igorm	7308d 04h	/ethmac/branches/unneback/rtl/verilog
321	- Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the previous update of the core. - TxBDAddress is set to 0 after the TX is enabled in the MODER register. - RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER register. (thanks to Mathias and Torbjorn) - Multicast reception was fixed. Thanks to Ulrich Gries	igorm	7311d 23h	/ethmac/branches/unneback/rtl/verilog

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Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] [rtl/] [verilog/] - Rev 362

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