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[/] [ethmac/] [branches/] [unneback/] [rtl/] [verilog/] [eth_top.v] - Rev 255

Rev	Log message	Author	Age	Path
80	Small fixes for external/internal DMA missmatches.	mohor	8116d 07h	/ethmac/branches/unneback/rtl/verilog/eth_top.v
76	Interrupts changed in the top file	mohor	8116d 08h	/ethmac/branches/unneback/rtl/verilog/eth_top.v
70	Small fixes.	mohor	8124d 14h	/ethmac/branches/unneback/rtl/verilog/eth_top.v
68	Registered trimmed. Unused registers removed.	mohor	8126d 10h	/ethmac/branches/unneback/rtl/verilog/eth_top.v
67	EXTERNAL_DMA used instead of WISHBONE_DMA.	mohor	8126d 11h	/ethmac/branches/unneback/rtl/verilog/eth_top.v
65	Testbench fixed, code simplified, unused signals removed.	mohor	8126d 17h	/ethmac/branches/unneback/rtl/verilog/eth_top.v
63	RxAbort is connected differently.	mohor	8127d 11h	/ethmac/branches/unneback/rtl/verilog/eth_top.v
59	Changes that were lost when updating from 1.11 to 1.14 fixed.	mohor	8127d 13h	/ethmac/branches/unneback/rtl/verilog/eth_top.v
52	Modified for Address Checking, addition of eth_addrcheck.v	billditt	8128d 04h	/ethmac/branches/unneback/rtl/verilog/eth_top.v
47	HASH0 and HASH1 registers added. Registers address width was changed to 8 bits.	mohor	8130d 07h	/ethmac/branches/unneback/rtl/verilog/eth_top.v