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116 Testing environment also includes traffic cop, memory interface and host
interface.
mohor 7962d 06h /ethmac/tags/rel_1/
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 7963d 04h /ethmac/tags/rel_1/
114 EXTERNAL_DMA removed. External DMA not supported. mohor 7964d 01h /ethmac/tags/rel_1/
113 RxPointer bug fixed. mohor 7970d 17h /ethmac/tags/rel_1/
112 Previous bug wasn't succesfully removed. Now fixed. mohor 7971d 07h /ethmac/tags/rel_1/
111 Master state machine had a bug when switching from master write to
master read.
mohor 7971d 20h /ethmac/tags/rel_1/
110 m_wb_cyc_o signal released after every single transfer. mohor 7971d 23h /ethmac/tags/rel_1/
109 Comment removed. mohor 7972d 00h /ethmac/tags/rel_1/
108 Testbench supports unaligned accesses. mohor 8039d 09h /ethmac/tags/rel_1/
107 TX_BUF_BASE changed. mohor 8039d 10h /ethmac/tags/rel_1/
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8039d 10h /ethmac/tags/rel_1/
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.
mohor 8048d 11h /ethmac/tags/rel_1/
104 FCS should not be included in NibbleMinFl. mohor 8050d 05h /ethmac/tags/rel_1/
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 8050d 06h /ethmac/tags/rel_1/
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 8050d 06h /ethmac/tags/rel_1/
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8050d 06h /ethmac/tags/rel_1/
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 8050d 06h /ethmac/tags/rel_1/
99 Document revised. mohor 8057d 05h /ethmac/tags/rel_1/
98 Document revised. mohor 8057d 05h /ethmac/tags/rel_1/
97 Small typo fixed. lampret 8074d 04h /ethmac/tags/rel_1/
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.
mohor 8078d 04h /ethmac/tags/rel_1/
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 8078d 06h /ethmac/tags/rel_1/
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.
mohor 8078d 06h /ethmac/tags/rel_1/
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8083d 05h /ethmac/tags/rel_1/
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.
mohor 8084d 07h /ethmac/tags/rel_1/
91 Comments in Slovene language removed. mohor 8084d 07h /ethmac/tags/rel_1/
90 casex changed with case, fifo reset changed. mohor 8084d 07h /ethmac/tags/rel_1/
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.
mohor 8088d 05h /ethmac/tags/rel_1/
88 rx_fifo was not always cleared ok. Fixed. mohor 8094d 04h /ethmac/tags/rel_1/
87 Status was not latched correctly sometimes. Fixed. mohor 8094d 06h /ethmac/tags/rel_1/

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