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Rev Log message Author Age Path
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.
mohor 7334d 09h /ethmac/tags/rel_1/
104 FCS should not be included in NibbleMinFl. mohor 7336d 03h /ethmac/tags/rel_1/
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 7336d 04h /ethmac/tags/rel_1/
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 7336d 04h /ethmac/tags/rel_1/
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 7336d 04h /ethmac/tags/rel_1/
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 7336d 04h /ethmac/tags/rel_1/
99 Document revised. mohor 7343d 03h /ethmac/tags/rel_1/
98 Document revised. mohor 7343d 03h /ethmac/tags/rel_1/
97 Small typo fixed. lampret 7360d 02h /ethmac/tags/rel_1/
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.
mohor 7364d 02h /ethmac/tags/rel_1/

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