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Rev Log message Author Age Path
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8097d 22h /ethmac/tags/rel_1/
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8097d 23h /ethmac/tags/rel_1/
80 Small fixes for external/internal DMA missmatches. mohor 8102d 01h /ethmac/tags/rel_1/
79 RetryCntLatched was unused and removed from design mohor 8102d 01h /ethmac/tags/rel_1/
78 WB_SEL_I was unused and removed from design mohor 8102d 01h /ethmac/tags/rel_1/
77 Interrupts changed mohor 8102d 01h /ethmac/tags/rel_1/
76 Interrupts changed in the top file mohor 8102d 01h /ethmac/tags/rel_1/
75 r_Bro is used for accepting/denying frames mohor 8102d 01h /ethmac/tags/rel_1/
74 Reset values are passed to registers through parameters mohor 8102d 01h /ethmac/tags/rel_1/
73 Number of interrupts changed mohor 8102d 01h /ethmac/tags/rel_1/
72 Retry is not activated when a Tx Underrun occured mohor 8106d 05h /ethmac/tags/rel_1/
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.		 mohor 8110d 06h /ethmac/tags/rel_1/
70 Small fixes. mohor 8110d 07h /ethmac/tags/rel_1/
69 Define missmatch fixed. mohor 8111d 04h /ethmac/tags/rel_1/
68 Registered trimmed. Unused registers removed. mohor 8112d 04h /ethmac/tags/rel_1/
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8112d 05h /ethmac/tags/rel_1/
66 Testbench fixed, code simplified, unused signals removed. mohor 8112d 10h /ethmac/tags/rel_1/
65 Testbench fixed, code simplified, unused signals removed. mohor 8112d 10h /ethmac/tags/rel_1/
64 Status was not written correctly when frames were discarted because of
address mismatch.		 mohor 8113d 01h /ethmac/tags/rel_1/
63 RxAbort is connected differently. mohor 8113d 04h /ethmac/tags/rel_1/

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