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Rev Log message Author Age Path
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.		 mohor 8067d 23h /ethmac/tags/rel_1/
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.		 mohor 8068d 01h /ethmac/tags/rel_1/
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.		 mohor 8068d 01h /ethmac/tags/rel_1/
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8073d 00h /ethmac/tags/rel_1/
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.		 mohor 8074d 02h /ethmac/tags/rel_1/
91 Comments in Slovene language removed. mohor 8074d 02h /ethmac/tags/rel_1/
90 casex changed with case, fifo reset changed. mohor 8074d 02h /ethmac/tags/rel_1/
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.		 mohor 8078d 00h /ethmac/tags/rel_1/
88 rx_fifo was not always cleared ok. Fixed. mohor 8083d 23h /ethmac/tags/rel_1/
87 Status was not latched correctly sometimes. Fixed. mohor 8084d 01h /ethmac/tags/rel_1/
86 Big Endian problem when sending frames fixed. mohor 8085d 08h /ethmac/tags/rel_1/
85 Log info was missing. mohor 8090d 18h /ethmac/tags/rel_1/
84 LinkFail signal was not latching appropriate bit. mohor 8090d 18h /ethmac/tags/rel_1/
83 MAC address recognition was not correct (bytes swaped). mohor 8090d 18h /ethmac/tags/rel_1/
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8090d 20h /ethmac/tags/rel_1/
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8090d 20h /ethmac/tags/rel_1/
80 Small fixes for external/internal DMA missmatches. mohor 8094d 22h /ethmac/tags/rel_1/
79 RetryCntLatched was unused and removed from design mohor 8094d 23h /ethmac/tags/rel_1/
78 WB_SEL_I was unused and removed from design mohor 8094d 23h /ethmac/tags/rel_1/
77 Interrupts changed mohor 8094d 23h /ethmac/tags/rel_1/

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