OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_1/] [rtl/] - Rev 119

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 7330d 06h /ethmac/tags/rel_1/rtl/
118 ShiftEnded synchronization changed. mohor 7333d 21h /ethmac/tags/rel_1/rtl/
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 7335d 06h /ethmac/tags/rel_1/rtl/
114 EXTERNAL_DMA removed. External DMA not supported. mohor 7336d 03h /ethmac/tags/rel_1/rtl/
113 RxPointer bug fixed. mohor 7342d 19h /ethmac/tags/rel_1/rtl/
112 Previous bug wasn't succesfully removed. Now fixed. mohor 7343d 09h /ethmac/tags/rel_1/rtl/
111 Master state machine had a bug when switching from master write to
master read.
mohor 7343d 22h /ethmac/tags/rel_1/rtl/
110 m_wb_cyc_o signal released after every single transfer. mohor 7344d 01h /ethmac/tags/rel_1/rtl/
109 Comment removed. mohor 7344d 02h /ethmac/tags/rel_1/rtl/
106 Outputs registered. Reset changed for eth_wishbone module. mohor 7411d 12h /ethmac/tags/rel_1/rtl/
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.
mohor 7420d 13h /ethmac/tags/rel_1/rtl/
104 FCS should not be included in NibbleMinFl. mohor 7422d 07h /ethmac/tags/rel_1/rtl/
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 7422d 08h /ethmac/tags/rel_1/rtl/
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 7422d 08h /ethmac/tags/rel_1/rtl/
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 7422d 08h /ethmac/tags/rel_1/rtl/
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 7422d 08h /ethmac/tags/rel_1/rtl/
97 Small typo fixed. lampret 7446d 06h /ethmac/tags/rel_1/rtl/
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.
mohor 7450d 06h /ethmac/tags/rel_1/rtl/
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 7450d 08h /ethmac/tags/rel_1/rtl/
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.
mohor 7450d 08h /ethmac/tags/rel_1/rtl/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2022 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.