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[/] [ethmac/] [tags/] [rel_1/] [rtl] - Rev 88

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Rev Log message Author Age Path
88 rx_fifo was not always cleared ok. Fixed. mohor 8097d 23h /ethmac/tags/rel_1/rtl
87 Status was not latched correctly sometimes. Fixed. mohor 8098d 01h /ethmac/tags/rel_1/rtl
86 Big Endian problem when sending frames fixed. mohor 8099d 08h /ethmac/tags/rel_1/rtl
85 Log info was missing. mohor 8104d 18h /ethmac/tags/rel_1/rtl
84 LinkFail signal was not latching appropriate bit. mohor 8104d 18h /ethmac/tags/rel_1/rtl
83 MAC address recognition was not correct (bytes swaped). mohor 8104d 18h /ethmac/tags/rel_1/rtl
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8104d 20h /ethmac/tags/rel_1/rtl
80 Small fixes for external/internal DMA missmatches. mohor 8108d 22h /ethmac/tags/rel_1/rtl
79 RetryCntLatched was unused and removed from design mohor 8108d 22h /ethmac/tags/rel_1/rtl
78 WB_SEL_I was unused and removed from design mohor 8108d 22h /ethmac/tags/rel_1/rtl
77 Interrupts changed mohor 8108d 22h /ethmac/tags/rel_1/rtl
76 Interrupts changed in the top file mohor 8108d 22h /ethmac/tags/rel_1/rtl
75 r_Bro is used for accepting/denying frames mohor 8108d 22h /ethmac/tags/rel_1/rtl
74 Reset values are passed to registers through parameters mohor 8108d 22h /ethmac/tags/rel_1/rtl
73 Number of interrupts changed mohor 8108d 23h /ethmac/tags/rel_1/rtl
72 Retry is not activated when a Tx Underrun occured mohor 8113d 02h /ethmac/tags/rel_1/rtl
70 Small fixes. mohor 8117d 04h /ethmac/tags/rel_1/rtl
69 Define missmatch fixed. mohor 8118d 01h /ethmac/tags/rel_1/rtl
68 Registered trimmed. Unused registers removed. mohor 8119d 01h /ethmac/tags/rel_1/rtl
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8119d 02h /ethmac/tags/rel_1/rtl

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