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Rev Log message Author Age Path
179 Beautiful tests merget together mohor 8062d 22h /ethmac/tags/rel_10/
178 Rearanged testcases mohor 8062d 22h /ethmac/tags/rel_10/
177 Bug in MIIM fixed. mohor 8063d 02h /ethmac/tags/rel_10/
176 lists changed to new directory structure mohor 8063d 04h /ethmac/tags/rel_10/
175 Script fixed to new dir structure mohor 8063d 04h /ethmac/tags/rel_10/
174 Directory keeper mohor 8063d 04h /ethmac/tags/rel_10/
173 Keeps the directory mohor 8063d 04h /ethmac/tags/rel_10/
172 NCSIM simulation environment added to cvs mohor 8063d 04h /ethmac/tags/rel_10/
171 NCSIM simulation environment added. mohor 8063d 04h /ethmac/tags/rel_10/
170 Headers changed. mohor 8063d 05h /ethmac/tags/rel_10/
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 8063d 05h /ethmac/tags/rel_10/
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 8064d 02h /ethmac/tags/rel_10/
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 8065d 03h /ethmac/tags/rel_10/
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.
mohor 8066d 03h /ethmac/tags/rel_10/
165 HASH improvement needed. mohor 8066d 06h /ethmac/tags/rel_10/
164 Ethernet debug registers removed. mohor 8066d 07h /ethmac/tags/rel_10/
163 Another temporary version. Core is almost finished. Testbench not included,
yet"
mohor 8066d 22h /ethmac/tags/rel_10/
162 Another temporary version. Core is almost finished. Testbench not included,
yet.
mohor 8066d 22h /ethmac/tags/rel_10/
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.
mohor 8067d 04h /ethmac/tags/rel_10/
160 error acknowledge cycle termination added to display. mohor 8067d 04h /ethmac/tags/rel_10/

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