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[/] [ethmac/] [tags/] [rel_10/] - Rev 236

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Rev Log message Author Age Path
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7871d 23h /ethmac/tags/rel_10/
235 rev 4. mohor 7872d 13h /ethmac/tags/rel_10/
234 Figure list assed to the revision 3. mohor 7872d 21h /ethmac/tags/rel_10/
233 Revision 0.3 released. Some figures added. mohor 7872d 22h /ethmac/tags/rel_10/
232 fpga define added. mohor 7877d 17h /ethmac/tags/rel_10/
231 Description of Core Modules added (figure). mohor 7879d 18h /ethmac/tags/rel_10/
229 case changed to casex. mohor 7883d 15h /ethmac/tags/rel_10/
227 Changed BIST scan signals. tadejm 7883d 19h /ethmac/tags/rel_10/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7883d 20h /ethmac/tags/rel_10/
225 Some minor changes. tadejm 7883d 20h /ethmac/tags/rel_10/
224 Signals for a wave window in Modelsim. tadejm 7883d 21h /ethmac/tags/rel_10/
223 Some code changed due to bug fixes. tadejm 7883d 22h /ethmac/tags/rel_10/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7887d 19h /ethmac/tags/rel_10/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 7890d 20h /ethmac/tags/rel_10/
218 Typo error fixed. (When using Bist) mohor 7890d 22h /ethmac/tags/rel_10/
217 Bist supported. mohor 7890d 22h /ethmac/tags/rel_10/
216 Bist signals added. mohor 7890d 22h /ethmac/tags/rel_10/
215 Bist supported. mohor 7890d 23h /ethmac/tags/rel_10/
214 Signals for WISHBONE B3 compliant interface added. mohor 7891d 19h /ethmac/tags/rel_10/
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 7891d 19h /ethmac/tags/rel_10/

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