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Rev Log message Author Age Path
86 Big Endian problem when sending frames fixed. mohor 8101d 05h /ethmac/tags/rel_10/
85 Log info was missing. mohor 8106d 15h /ethmac/tags/rel_10/
84 LinkFail signal was not latching appropriate bit. mohor 8106d 15h /ethmac/tags/rel_10/
83 MAC address recognition was not correct (bytes swaped). mohor 8106d 15h /ethmac/tags/rel_10/
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8106d 17h /ethmac/tags/rel_10/
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8106d 17h /ethmac/tags/rel_10/
80 Small fixes for external/internal DMA missmatches. mohor 8110d 19h /ethmac/tags/rel_10/
79 RetryCntLatched was unused and removed from design mohor 8110d 20h /ethmac/tags/rel_10/
78 WB_SEL_I was unused and removed from design mohor 8110d 20h /ethmac/tags/rel_10/
77 Interrupts changed mohor 8110d 20h /ethmac/tags/rel_10/
76 Interrupts changed in the top file mohor 8110d 20h /ethmac/tags/rel_10/
75 r_Bro is used for accepting/denying frames mohor 8110d 20h /ethmac/tags/rel_10/
74 Reset values are passed to registers through parameters mohor 8110d 20h /ethmac/tags/rel_10/
73 Number of interrupts changed mohor 8110d 20h /ethmac/tags/rel_10/
72 Retry is not activated when a Tx Underrun occured mohor 8114d 23h /ethmac/tags/rel_10/
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.		 mohor 8119d 00h /ethmac/tags/rel_10/
70 Small fixes. mohor 8119d 01h /ethmac/tags/rel_10/
69 Define missmatch fixed. mohor 8119d 23h /ethmac/tags/rel_10/
68 Registered trimmed. Unused registers removed. mohor 8120d 22h /ethmac/tags/rel_10/
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8120d 23h /ethmac/tags/rel_10/

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