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338 root 5475d 16h /ethmac/tags/rel_11/
335 New directory structure. root 5532d 21h /ethmac/tags/rel_11/
249 This commit was manufactured by cvs2svn to create tag 'rel_11'. 7835d 14h /ethmac/tags/rel_11/
248 wb_rst_i is used for MIIM reset. mohor 7835d 14h /ethmac/tags/rel_11/
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7838d 17h /ethmac/tags/rel_11/
245 Rev 1.7. mohor 7839d 11h /ethmac/tags/rel_11/
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7839d 13h /ethmac/tags/rel_11/
243 Late collision is not reported any more. tadejm 7839d 18h /ethmac/tags/rel_11/
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 7840d 09h /ethmac/tags/rel_11/
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7840d 09h /ethmac/tags/rel_11/
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7840d 09h /ethmac/tags/rel_11/
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7840d 09h /ethmac/tags/rel_11/
238 Defines fixed to use generic RAM by default. mohor 7852d 13h /ethmac/tags/rel_11/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7854d 19h /ethmac/tags/rel_11/
235 rev 4. mohor 7855d 09h /ethmac/tags/rel_11/
234 Figure list assed to the revision 3. mohor 7855d 17h /ethmac/tags/rel_11/
233 Revision 0.3 released. Some figures added. mohor 7855d 18h /ethmac/tags/rel_11/
232 fpga define added. mohor 7860d 13h /ethmac/tags/rel_11/
231 Description of Core Modules added (figure). mohor 7862d 14h /ethmac/tags/rel_11/
229 case changed to casex. mohor 7866d 11h /ethmac/tags/rel_11/
227 Changed BIST scan signals. tadejm 7866d 14h /ethmac/tags/rel_11/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7866d 16h /ethmac/tags/rel_11/
225 Some minor changes. tadejm 7866d 16h /ethmac/tags/rel_11/
224 Signals for a wave window in Modelsim. tadejm 7866d 17h /ethmac/tags/rel_11/
223 Some code changed due to bug fixes. tadejm 7866d 17h /ethmac/tags/rel_11/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7870d 15h /ethmac/tags/rel_11/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 7873d 16h /ethmac/tags/rel_11/
218 Typo error fixed. (When using Bist) mohor 7873d 18h /ethmac/tags/rel_11/
217 Bist supported. mohor 7873d 18h /ethmac/tags/rel_11/
216 Bist signals added. mohor 7873d 18h /ethmac/tags/rel_11/

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