OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_11/] - Rev 89

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.
mohor 8088d 06h /ethmac/tags/rel_11/
88 rx_fifo was not always cleared ok. Fixed. mohor 8094d 05h /ethmac/tags/rel_11/
87 Status was not latched correctly sometimes. Fixed. mohor 8094d 08h /ethmac/tags/rel_11/
86 Big Endian problem when sending frames fixed. mohor 8095d 14h /ethmac/tags/rel_11/
85 Log info was missing. mohor 8101d 00h /ethmac/tags/rel_11/
84 LinkFail signal was not latching appropriate bit. mohor 8101d 00h /ethmac/tags/rel_11/
83 MAC address recognition was not correct (bytes swaped). mohor 8101d 00h /ethmac/tags/rel_11/
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
mohor 8101d 02h /ethmac/tags/rel_11/
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8101d 02h /ethmac/tags/rel_11/
80 Small fixes for external/internal DMA missmatches. mohor 8105d 04h /ethmac/tags/rel_11/
79 RetryCntLatched was unused and removed from design mohor 8105d 05h /ethmac/tags/rel_11/
78 WB_SEL_I was unused and removed from design mohor 8105d 05h /ethmac/tags/rel_11/
77 Interrupts changed mohor 8105d 05h /ethmac/tags/rel_11/
76 Interrupts changed in the top file mohor 8105d 05h /ethmac/tags/rel_11/
75 r_Bro is used for accepting/denying frames mohor 8105d 05h /ethmac/tags/rel_11/
74 Reset values are passed to registers through parameters mohor 8105d 05h /ethmac/tags/rel_11/
73 Number of interrupts changed mohor 8105d 05h /ethmac/tags/rel_11/
72 Retry is not activated when a Tx Underrun occured mohor 8109d 08h /ethmac/tags/rel_11/
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.
mohor 8113d 10h /ethmac/tags/rel_11/
70 Small fixes. mohor 8113d 11h /ethmac/tags/rel_11/
69 Define missmatch fixed. mohor 8114d 08h /ethmac/tags/rel_11/
68 Registered trimmed. Unused registers removed. mohor 8115d 07h /ethmac/tags/rel_11/
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8115d 08h /ethmac/tags/rel_11/
66 Testbench fixed, code simplified, unused signals removed. mohor 8115d 14h /ethmac/tags/rel_11/
65 Testbench fixed, code simplified, unused signals removed. mohor 8115d 14h /ethmac/tags/rel_11/
64 Status was not written correctly when frames were discarted because of
address mismatch.
mohor 8116d 04h /ethmac/tags/rel_11/
63 RxAbort is connected differently. mohor 8116d 08h /ethmac/tags/rel_11/
62 RxAbort is an output. No need to have is declared as wire. mohor 8116d 08h /ethmac/tags/rel_11/
61 RxStartFrm cleared when abort or retry comes. mohor 8116d 09h /ethmac/tags/rel_11/
60 Changes that were lost when updating from 1.5 to 1.8 fixed. mohor 8116d 09h /ethmac/tags/rel_11/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.