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[/] [ethmac/] [tags/] [rel_11/] [bench/] [verilog/] - Rev 338


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Rev Log message Author Age Path
338 root 4890d 03h /ethmac/tags/rel_11/bench/verilog/
335 New directory structure. root 4947d 09h /ethmac/tags/rel_11/bench/verilog/
249 This commit was manufactured by cvs2svn to create tag 'rel_11'. 7250d 01h /ethmac/tags/rel_11/bench/verilog/
243 Late collision is not reported any more. tadejm 7254d 05h /ethmac/tags/rel_11/bench/verilog/
227 Changed BIST scan signals. tadejm 7281d 02h /ethmac/tags/rel_11/bench/verilog/
223 Some code changed due to bug fixes. tadejm 7281d 05h /ethmac/tags/rel_11/bench/verilog/
216 Bist signals added. mohor 7288d 05h /ethmac/tags/rel_11/bench/verilog/
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.
tadejm 7290d 05h /ethmac/tags/rel_11/bench/verilog/
194 Full duplex tests modified and testbench bug repaired. tadej 7309d 04h /ethmac/tags/rel_11/bench/verilog/
192 Some additional reports added tadej 7311d 01h /ethmac/tags/rel_11/bench/verilog/
191 Bug repaired in eth_phy device tadej 7311d 01h /ethmac/tags/rel_11/bench/verilog/
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).
mohor 7311d 02h /ethmac/tags/rel_11/bench/verilog/
188 PHY changed. tadej 7311d 23h /ethmac/tags/rel_11/bench/verilog/
182 Full duplex test improved. tadej 7313d 01h /ethmac/tags/rel_11/bench/verilog/
181 MIIM test look better. mohor 7313d 04h /ethmac/tags/rel_11/bench/verilog/
180 Bench outputs data to display every 128 bytes. mohor 7315d 23h /ethmac/tags/rel_11/bench/verilog/
179 Beautiful tests merget together mohor 7316d 00h /ethmac/tags/rel_11/bench/verilog/
178 Rearanged testcases mohor 7316d 00h /ethmac/tags/rel_11/bench/verilog/
177 Bug in MIIM fixed. mohor 7316d 04h /ethmac/tags/rel_11/bench/verilog/
170 Headers changed. mohor 7316d 06h /ethmac/tags/rel_11/bench/verilog/

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