OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_11/] [rtl/] - Rev 338

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 6161d 02h /ethmac/tags/rel_11/rtl/
212 Minor $display change. mohor 6161d 02h /ethmac/tags/rel_11/rtl/
211 Bist added. mohor 6161d 02h /ethmac/tags/rel_11/rtl/
210 BIST added. mohor 6161d 02h /ethmac/tags/rel_11/rtl/
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 6178d 00h /ethmac/tags/rel_11/rtl/
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.
mohor 6178d 00h /ethmac/tags/rel_11/rtl/
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.
mohor 6181d 01h /ethmac/tags/rel_11/rtl/
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 6189d 04h /ethmac/tags/rel_11/rtl/
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 6190d 04h /ethmac/tags/rel_11/rtl/
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.
mohor 6191d 05h /ethmac/tags/rel_11/rtl/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2019 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.