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[/] [ethmac/] [tags/] [rel_13/] [rtl/] - Rev 232

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Rev	Log message	Author	Age	Path
232	fpga define added.	mohor	7876d 02h	/ethmac/tags/rel_13/rtl
229	case changed to casex.	mohor	7882d 00h	/ethmac/tags/rel_13/rtl
227	Changed BIST scan signals.	tadejm	7882d 04h	/ethmac/tags/rel_13/rtl
226	Igor added WB burst support and repaired BUG when handling TX under-run and retry.	tadejm	7882d 05h	/ethmac/tags/rel_13/rtl
221	TxStatus is written after last access to the TX fifo is finished (in case of abort or retry). TxDone is fixed.	mohor	7886d 05h	/ethmac/tags/rel_13/rtl
219	txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file, TxDone and TxRetry are generated after the current WISHBONE access is finished.	mohor	7889d 05h	/ethmac/tags/rel_13/rtl
218	Typo error fixed. (When using Bist)	mohor	7889d 07h	/ethmac/tags/rel_13/rtl
214	Signals for WISHBONE B3 compliant interface added.	mohor	7890d 04h	/ethmac/tags/rel_13/rtl
213	Defines changed to have ETH_ prolog. ETH_WISHBONE_B# define added.	mohor	7890d 04h	/ethmac/tags/rel_13/rtl
212	Minor $display change.	mohor	7890d 04h	/ethmac/tags/rel_13/rtl
211	Bist added.	mohor	7890d 04h	/ethmac/tags/rel_13/rtl
210	BIST added.	mohor	7890d 04h	/ethmac/tags/rel_13/rtl
204	ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation).	mohor	7907d 02h	/ethmac/tags/rel_13/rtl
203	Virtual Silicon RAM might be used in the ASIC implementation of the ethernet core.	mohor	7907d 02h	/ethmac/tags/rel_13/rtl
202	CsMiss added. When address between 0x800 and 0xfff is accessed within Ethernet Core, error acknowledge is generated.	mohor	7910d 04h	/ethmac/tags/rel_13/rtl
168	CarrierSenseLost bug fixed when operating in full duplex mode.	mohor	7918d 06h	/ethmac/tags/rel_13/rtl
167	Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed.	mohor	7919d 07h	/ethmac/tags/rel_13/rtl
166	Reception is possible after RxPointer is read and not after BD is read. For that reason RxBDReady is changed to RxReady. Busy_IRQ interrupt connected. When there is no RxBD ready and frame comes, interrupt is generated.	mohor	7920d 07h	/ethmac/tags/rel_13/rtl
165	HASH improvement needed.	mohor	7920d 10h	/ethmac/tags/rel_13/rtl
164	Ethernet debug registers removed.	mohor	7920d 10h	/ethmac/tags/rel_13/rtl
161	Error acknowledge is generated when accessing BDs and RST bit in the MODER register (r_Rst) is set.	mohor	7921d 08h	/ethmac/tags/rel_13/rtl
160	error acknowledge cycle termination added to display.	mohor	7921d 08h	/ethmac/tags/rel_13/rtl
159	Async reset for WB_ACK_O removed (when core was in reset, it was impossible to access BDs). RxPointers and TxPointers names changed to be more descriptive. TxUnderRun synchronized.	mohor	7922d 04h	/ethmac/tags/rel_13/rtl
150	Debug registers reg1, 2, 3, 4 connected. Synchronization of many signals changed (bugs fixed). Access to un-alligned buffers fixed. RxAbort signal was not used OK.	mohor	7926d 02h	/ethmac/tags/rel_13/rtl
149	Signals related to the control frames connected. Debug registers reg1, 2, 3, 4 connected.	mohor	7926d 02h	/ethmac/tags/rel_13/rtl
148	Bug when last byte of destination address was not checked fixed.	mohor	7926d 02h	/ethmac/tags/rel_13/rtl
147	ETH_TXCTRL and ETH_RXCTRL registers added. Interrupts related to the control frames connected.	mohor	7926d 02h	/ethmac/tags/rel_13/rtl
146	CarrierSenseLost status is not set when working in loopback mode.	mohor	7926d 02h	/ethmac/tags/rel_13/rtl
145	Defines for control registers added (ETH_TXCTRL and ETH_RXCTRL).	mohor	7926d 02h	/ethmac/tags/rel_13/rtl
143	Only values smaller or equal to 0x80 can be written to TX_BD_NUM register. r_TxEn and r_RxEn depend on the limit values of the TX_BD_NUMOut.	mohor	7942d 05h	/ethmac/tags/rel_13/rtl

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[/] [ethmac/] [tags/] [rel_13/] [rtl/] - Rev 232

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