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[/] [ethmac/] [tags/] [rel_13/] [rtl/] [verilog/] [eth_top.v] - Rev 338

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Rev Log message Author Age Path
114 EXTERNAL_DMA removed. External DMA not supported. mohor 7974d 22h /ethmac/tags/rel_13/rtl/verilog/eth_top.v
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8050d 06h /ethmac/tags/rel_13/rtl/verilog/eth_top.v
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 8061d 02h /ethmac/tags/rel_13/rtl/verilog/eth_top.v
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 8089d 03h /ethmac/tags/rel_13/rtl/verilog/eth_top.v
80 Small fixes for external/internal DMA missmatches. mohor 8116d 00h /ethmac/tags/rel_13/rtl/verilog/eth_top.v
76 Interrupts changed in the top file mohor 8116d 00h /ethmac/tags/rel_13/rtl/verilog/eth_top.v
70 Small fixes. mohor 8124d 06h /ethmac/tags/rel_13/rtl/verilog/eth_top.v
68 Registered trimmed. Unused registers removed. mohor 8126d 03h /ethmac/tags/rel_13/rtl/verilog/eth_top.v
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8126d 03h /ethmac/tags/rel_13/rtl/verilog/eth_top.v
65 Testbench fixed, code simplified, unused signals removed. mohor 8126d 09h /ethmac/tags/rel_13/rtl/verilog/eth_top.v

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