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338 root 5482d 04h /ethmac/tags/rel_14/
335 New directory structure. root 5539d 09h /ethmac/tags/rel_14/
271 This commit was manufactured by cvs2svn to create tag 'rel_14'. 7778d 07h /ethmac/tags/rel_14/
270 When receiving normal data frame and RxFlow control was switched on, RXB
interrupt was not set.		 mohor 7778d 07h /ethmac/tags/rel_14/
269 When in full duplex, transmit was sometimes blocked. Fixed. mohor 7779d 07h /ethmac/tags/rel_14/
268 Release 1.19. Control frame description changed. mohor 7833d 00h /ethmac/tags/rel_14/
267 Full duplex control frames tested. mohor 7833d 02h /ethmac/tags/rel_14/
266 Flow control test almost finished. mohor 7838d 01h /ethmac/tags/rel_14/
264 Registers RxStatusWrite_rck and RxStatusWriteLatched were not used
anywhere. Removed.		 mohor 7838d 05h /ethmac/tags/rel_14/
263 test_mac_full_duplex_flow_control tests pretty much finished.
TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL
FRM. AT 4 TX BD ( 10Mbps ) finished.
TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION
TURNED OFF AT ONE RX BD ( 10Mbps ) finished.		 mohor 7838d 17h /ethmac/tags/rel_14/
262 Version 1.18 released.
MIIMRST (Reset of the MIIM module) not used any more in the MIIMODER
register. Control Frame bit (CF) added to the RX buffer descriptor. Control
frame detection section updated.		 mohor 7838d 17h /ethmac/tags/rel_14/
261 Rx Flow control fixed. CF flag added to the RX buffer descriptor. RxAbort
synchronized.		 mohor 7838d 17h /ethmac/tags/rel_14/
260 test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame
finished.		 mohor 7839d 05h /ethmac/tags/rel_14/
259 In loopback rx_clk is not looped back. Possible CRC error. Consider if usage
of additional logic is necessery (FIFO for looping the data).		 mohor 7839d 18h /ethmac/tags/rel_14/
257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.		 mohor 7839d 19h /ethmac/tags/rel_14/
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.		 mohor 7839d 19h /ethmac/tags/rel_14/
255 TPauseRq synchronized to tx_clk. mohor 7839d 19h /ethmac/tags/rel_14/
254 Temp version. mohor 7840d 22h /ethmac/tags/rel_14/
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7841d 01h /ethmac/tags/rel_14/
252 Just some updates. tadejm 7841d 01h /ethmac/tags/rel_14/
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.		 mohor 7841d 01h /ethmac/tags/rel_14/
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.		 mohor 7841d 01h /ethmac/tags/rel_14/
248 wb_rst_i is used for MIIM reset. mohor 7842d 01h /ethmac/tags/rel_14/
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7845d 04h /ethmac/tags/rel_14/
245 Rev 1.7. mohor 7845d 22h /ethmac/tags/rel_14/
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7846d 00h /ethmac/tags/rel_14/
243 Late collision is not reported any more. tadejm 7846d 06h /ethmac/tags/rel_14/
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).		 tadejm 7846d 20h /ethmac/tags/rel_14/
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.		 tadejm 7846d 20h /ethmac/tags/rel_14/
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7846d 20h /ethmac/tags/rel_14/

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