URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_14/] [bench/] [verilog/] [tb_ethernet.v] - Rev 338

Rev	Log message	Author	Age	Path
177	Bug in MIIM fixed.	mohor	7896d 15h	/ethmac/tags/rel_14/bench/verilog/tb_ethernet.v
170	Headers changed.	mohor	7896d 18h	/ethmac/tags/rel_14/bench/verilog/tb_ethernet.v
169	New testbench. Thanks to Tadej M - "The Spammer".	mohor	7896d 18h	/ethmac/tags/rel_14/bench/verilog/tb_ethernet.v
158	Typo fixed.	mohor	7901d 14h	/ethmac/tags/rel_14/bench/verilog/tb_ethernet.v
156	Valid testbench.	mohor	7903d 19h	/ethmac/tags/rel_14/bench/verilog/tb_ethernet.v
121	gsr added for use when ETH_XILINX_RAMB4 define is set.	mohor	7948d 14h	/ethmac/tags/rel_14/bench/verilog/tb_ethernet.v
117	Clock mrx_clk set to 2.5 MHz.	mohor	7952d 16h	/ethmac/tags/rel_14/bench/verilog/tb_ethernet.v
116	Testing environment also includes traffic cop, memory interface and host interface.	mohor	7952d 16h	/ethmac/tags/rel_14/bench/verilog/tb_ethernet.v