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[/] [ethmac/] [tags/] [rel_14/] [rtl/] - Rev 221


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Rev Log message Author Age Path
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 6555d 12h /ethmac/tags/rel_14/rtl/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
mohor 6558d 13h /ethmac/tags/rel_14/rtl/
218 Typo error fixed. (When using Bist) mohor 6558d 15h /ethmac/tags/rel_14/rtl/
214 Signals for WISHBONE B3 compliant interface added. mohor 6559d 12h /ethmac/tags/rel_14/rtl/
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 6559d 12h /ethmac/tags/rel_14/rtl/
212 Minor $display change. mohor 6559d 12h /ethmac/tags/rel_14/rtl/
211 Bist added. mohor 6559d 12h /ethmac/tags/rel_14/rtl/
210 BIST added. mohor 6559d 12h /ethmac/tags/rel_14/rtl/
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 6576d 10h /ethmac/tags/rel_14/rtl/
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
mohor 6576d 10h /ethmac/tags/rel_14/rtl/
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.
mohor 6579d 11h /ethmac/tags/rel_14/rtl/
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 6587d 14h /ethmac/tags/rel_14/rtl/
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 6588d 14h /ethmac/tags/rel_14/rtl/
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.
mohor 6589d 15h /ethmac/tags/rel_14/rtl/
165 HASH improvement needed. mohor 6589d 18h /ethmac/tags/rel_14/rtl/
164 Ethernet debug registers removed. mohor 6589d 18h /ethmac/tags/rel_14/rtl/
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.
mohor 6590d 15h /ethmac/tags/rel_14/rtl/
160 error acknowledge cycle termination added to display. mohor 6590d 16h /ethmac/tags/rel_14/rtl/
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.
mohor 6591d 12h /ethmac/tags/rel_14/rtl/
150 Debug registers reg1, 2, 3, 4 connected. Synchronization of many signals
changed (bugs fixed). Access to un-alligned buffers fixed. RxAbort signal
was not used OK.
mohor 6595d 10h /ethmac/tags/rel_14/rtl/

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