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[/] [ethmac/] [tags/] [rel_14/] [rtl/] [verilog/] [eth_top.v] - Rev 271

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106 Outputs registered. Reset changed for eth_wishbone module. mohor 8046d 00h /ethmac/tags/rel_14/rtl/verilog/eth_top.v
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 8056d 20h /ethmac/tags/rel_14/rtl/verilog/eth_top.v
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 8084d 21h /ethmac/tags/rel_14/rtl/verilog/eth_top.v
80 Small fixes for external/internal DMA missmatches. mohor 8111d 18h /ethmac/tags/rel_14/rtl/verilog/eth_top.v
76 Interrupts changed in the top file mohor 8111d 18h /ethmac/tags/rel_14/rtl/verilog/eth_top.v
70 Small fixes. mohor 8120d 00h /ethmac/tags/rel_14/rtl/verilog/eth_top.v
68 Registered trimmed. Unused registers removed. mohor 8121d 21h /ethmac/tags/rel_14/rtl/verilog/eth_top.v
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8121d 22h /ethmac/tags/rel_14/rtl/verilog/eth_top.v
65 Testbench fixed, code simplified, unused signals removed. mohor 8122d 03h /ethmac/tags/rel_14/rtl/verilog/eth_top.v
63 RxAbort is connected differently. mohor 8122d 21h /ethmac/tags/rel_14/rtl/verilog/eth_top.v

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